ENES 246 — Digital Logic Design with Lab
This course will introduce the basic principles and design procedures of digital systems at the gate and intermediate chip levels for electrical engineering students. Students will acquire knowledge of gates, flip-flops, registers, counters, Karnaugh maps, FSM, ASM, and paper digital design techniques. The labs start with TTL chip circuit building, move through Verilog HDL test bench event simulators, and end with physically implementing circuits in FPGA chips with vendor software.
Prerequisites: ENES 100, MATH 153